Devices Model .

MAGIC TUTORIAL

Type the command :grid
Type the command :zoom 0.5
First make a box of hight 4 and width 45 ; use the :box command to verify the right dimension. :box width 45, :box height 4

Since it is a voltage source, the layer should be like metal1. Make the box metal1 using the command :paint metal1

Now we have to make the p-type diffusion. Make a box of hight 19 and width 3 as shown.:box width 3, :box height 19

Paint the box by a pdiffusion using :paint pdiff.

Make a box of height 3 and width 23 as shown.:box width 23, :box height 3

Paint the box with pdiffusion using :paint pdiff or by clicking the old pdiff using the mouse center button .

Make a box as shown using the :center command to move the window and make the box of height 16 and width 3 .

Conncet the p-diffusion to the n-diffusion using a metal1. Paint the box using metal1 :paint metal1

Make another box as shown and paint it using :paing ndiff

Make the shown box and also paint it using :paint ndiff .

Make the 2nd metal1 line to be connected to ground as shown.

Make the polysilicon line (hieght 47 width 3 ) representing the gate as shown ( use :paint poly )

Go to the first metal1 line and move the cursur their ; then put a cross by clicking the left mouse button then the right one ; then do the command ,b>:label Vdd!

Add lebels GND! to the second metal1 Line and OUT to the output terminal and IN to the polysilicon line .

Go to the intersection of pdiff and metal 1 and place a 4x4 box as shown in the graph below .

Use :paint pdc to put a pdiffusion contact that will connect metal1 Vdd with the pdiffusion layer .

Do anther one at the second contact of the same type as shown below .

Add a box as shown below .

Add an ndiffusion contact using (:paint ndc ) as shown .

Add another ndc as shown below .

Now your first layout is complete and to see it all excute (:view ) ; then save the file by ( :save test ) ; you will have a file called test.mag in your directory .

To extract the circuit ; excute the command ( :ext ) ; it will extract the circuit into a file named test.ext ; quit magic by ( :q ) then run the following from the command tool ;
ext2spice test

This should create a file called test.spice that looks like the following ;


** SPICE file created for circuit test
** Technology: scmos
**

** NODE: 0 = GND
** NODE: 1 = Vdd
** NODE: 2 = Error
RLUMP0 100 101 151.0
RLUMP1 102 103 183.5
M0 101 103 1 1 pfet L=3.0U W=3.0U
RLUMP2 100 104 151.0
RLUMP3 102 105 183.5
M1 104 105 0 0 nfet L=3.0U W=3.0U
** NODE: 0 = GND!
C0 100 0 41F
** NODE: 100 = out
C1 102 0 12F
** NODE: 102 = IN
C2 1 0 49F
** NODE: 1 = Vdd!

Notice that you have a CMOS Inverter with some extra small resistors and capacitors ; identify the circuit and then edit by adding the following lines at the end of test.spice file :

Vdd 1 0 10
vin 102 0 0
.dc vin 0 10 0.1
.options post 
.model nfet nmos level=3 ld=0.138260u tox=398.0e-10 
+ nsub=5.36726e+15 vto=0.743469 kp=5.69059e-5 gamma=0.486502
+ phi=0.6 uo=655.881 uexp=0.157282 ucrit=31443.8 
+ delta=2.39824 vmax=55260.9 xj=.250000u lambda=0.0367072
+ nfs=1e+12 neff=1.001 nss=1e+11 tpg=1.000000
+ rsh=36.87 cgdo=1.19953e-10 cgso=1.19953e-10
+ cj=0.0001595 mj=0.658500 cjsw=5.249e-10 mjsw=0.240200 pb=0.580000

.model pfet pmos level=3 ld=0.061533u tox=398.0e-10 
+ nsub=4.3318e+15 vto=-0.738861 kp=2.27298e-5 gamma=0.437062
+ phi=0.6 uo=261.977 uexp=.323932 ucrit=65719.8
+ delta=1.79192 vmax=25694 xj=.250000u lambda=0.0612279
+ nfs=1e+12  neff=1.001 nss=1e+11 tpg=-1.000000
+ rsh=146.6 cgdo=5.33853e-11 cgso=5.33853e-11
+ cj=0.000255 mj=0.505200 cjsw=3.119e-10 mjsw=0.241700 pb=0.640000
.end

Now do the actual simulation using hspice ; and draw the voltage at node 100 in the y axis and vin for the x axis ; the graph below shows the curve that you should get .

Edit the line that defines the pfet transistor such that it's width becomes 2.5 that of the nfet one and repeate the simulation to get the graph below then comment on that .